News

Next On-Site Seminar on 19.08.2026, CISPA C0 Room 0.02, Stuhlsatzenhaus 5, 66123 Saarbrücken

Written on 11.08.2026 23:39 by Xinyi Xu

Dear All,


The next seminar(s) will take place on 19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken) - CISPA C0 Room 0.02, Stuhlsatzenhaus 5, 66123 Saarbrücken. Presenters and their advisors are encouraged to present in person. We especially encourage other students and teachers to attend and present in person as well.

For presenters,
1. We would book the room half an hour in advance, so you are encouraged to arrive a few minutes early to set up your own poster.
2. For this session, you need to print the poster on your own. The size of the poster should be 116x86cm or 86x116cm. You can use the poster printing service of Saarland University (https://www.uni-saarland.de/en/page/uds-card/functions/printing.html -> Posterdruck A0).
3. You need to present your poster in a much smaller group, but you are encouraged to roam around and ask questions about other posters.
4. We encourage you to bring your laptop to present your demo; there will be small tables in the room where you can put your laptop.
 

 

Presenters: Michael Jeremy Rack, Kirill Mitsik, Alireza Kheradmand, Rumman Ali Syed, Saira Sohail Anwari, Ahrar Bin Aslam, Syed Sajjad Raza Rizvi, Julian Rederlechner, Niklas Lohmann, Alexandru Andrița, Kajo Mertz, Abhi Maheshbhai Gabani, Arnold Smakaj

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

Presenter: Michael Jeremy Rack

Type of Poster: Master Intro

Advisor: Sebastian Stich

Title: ""Beyond Single-Hop µTransfer: Drift Characterization and Adaptive Refinement""

Research Area: RA2: Trustworthy Information Processing

Abstract: Hyperparameter (HP) transfer under µP and its extensions enables tuning large language models by searching at small scale and transferring the optimal HPs to the target scale. While effective, this transfer is imperfect: optimal HPs drift across scales due to finite-size effects, and recent work reports that per-module tuning speed-ups erode substantially when transferred to larger models (e.g., from 2.31× at 50M to 1.32× at 7.2B parameters). The sources of this drift, and the extent to which it can be reduced, remain poorly understood. This thesis investigates HP transfer drift in µP-parameterized Transformers. We first characterize the noise floor of the transfer setting—seed-induced variance and the width of the near-optimal HP basin—against which drift must be normalized. We then propose Recursive µTransfer, an iterative procedure that refines HPs across intermediate scales using sensitivity-adaptive local search, and study architectural interventions (normalization, initialization, residual scaling) as a proactive complement, motivated by recent findings linking sharpness super-consistency to transfer success. Expected contributions: a quantitative noise-floor characterization, an empirical classification of HPs by transfer fidelity, a sensitivity-adaptive multi-hop transfer method, and a comparison of procedural and architectural drift-reduction strategies under matched compute budgets.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Kirill Mitsik

Type of Poster: Bachelor Intro

Advisor: Lucjan Hanzlik

Title: Subset Credentials: A Privacy Enhancement for the EUDI Wallet

Research Area: RA1: Algorithmic Foundations and Cryptography

Abstract: The European Digital Identity Wallet allows users to store and present digital credentials across the EU, but selective disclosure alone may still allow presentations to be linked to a single credential holder. This thesis introduces a privacy-enhancing approach in which users present a valid subset of credentials obtained from multiple participants while proving that at least one credential in the subset belongs to them. The construction combines selective-disclosure credentials, such as SD-JWTs, with a cryptographic proof of key ownership to preserve authenticity without revealing which specific credential belongs to the user. The thesis develops the protocol design, analyzes its security and privacy properties, and examines how it could be integrated into the EUDI Wallet ecosystem. The proposed approach aims to reduce linkability and improve anonymity while remaining compatible with existing digital-identity mechanisms.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Alireza Kheradmand

Type of Poster: Master Intro

Advisor: Tural Mammadov, Andreas Zeller

Title: Learning Input Specifications via Entity Abstraction - An LLM-Driven Approach to Type-Aware Testing of Black-Box Systems

Research Area: RA4: Threat Detection and Defenses

Abstract: Many real-world programs accept complex inputs whose specifications could be unavailable, incomplete, or too complicated. This limitation prevents software testers from applying grammar-based fuzzing to test such programs because defining an input grammar depends on the availability of a complete specification. Although mutation-based fuzzing remains applicable, the majority of inputs generated by mutational fuzzers are rejected by the program’s parser since they violate the expected input structure. This thesis introduces a software testing framework that enables targeted grammar fuzzing for programs whose input specifications are not at hand. At a high level, the framework derives a partial grammar from a set of accepted seed inputs. It preserves the overall input structure as concrete text literals while detecting and abstracting candidate fragments into semantic types suitable for fuzzing. We leverage pre-trained Large Language Models to identify candidate fragment boundaries and their semantic types. Language models process textual data of arbitrary form by design. Having been trained on extensive datasets, we hypothesize that they can reliably detect the semantic types of user-defined candidate fragments. We then employ FANDANGO, a language-based fuzzer for input generation, to synthesize replacements for each abstracted fragment. Fandango will use a knowledge base of pre-defined grammars and python constraints that are incorporated into the framework. This process enables us to generate variations of the initial seeds that retain the high-level input structure while potentially exercising new program behaviors. This thesis will evaluate the effectiveness of type-aware fragment abstraction using LLMs by assessing improvements in behavioral diversity of the generated inputs relative to the initial seeds.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Rumman Ali Syed

Type of Poster: Master Intro

Advisor: Dr Sebastian Stich

Title: On the Validity of Central Flow/Rod Flow as a Continuous-Time Approximation for Gradient Descent at the Edge of Stability

Research Area: RA2: Trustworthy Information Processing

Abstract: Continuous-time models of gradient descent at the edge of stability (EOS) — where the loss sharpness pins to the critical value 2/η — have emerged as a promising framework for understanding deep learning optimization. Central Flow (Cohen et al., 2025) and Rod Flow (Regis and Chewi, 2026) are two such models, each decomposing the GD trajectory into a slowly drifting center and a fast oscillation, but differing in how the oscillation is represented and how its amplitude is determined and its derivation is presented as a general characterization of EOS dynamics. We identify counter examples where centre and rod flow fail. We depict that each of these flow fail when exposed to a unique paradigm, for example progressive sharpening or high curvature. We propose a theory explaining why each of them fail during these timescales.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Saira Sohail Anwari

Type of Poster: Master Intro

Advisor: Mario Fritz, Christoph Landolt, Hossein Hajipour

Title: Secure Code Generation via Representation-Informed Activation Steering and Contrastive Decoding

Research Area: RA2: Trustworthy Information Processing

Abstract: Large Language Models (LLMs) are increasingly used to generate code, yet the security of their output has not kept pace with its functional correctness. Recent benchmarks demonstrate that while syntactic and functional pass rates have risen substantially across successive model releases, security pass rates have remained largely stagnant. Mitigations at the input level, such as explicit security instructions or automated prompt optimisation, reduce this discrepancy but fail to eliminate it, suggesting that the underlying failure may not be addressable through prompting alone. This thesis investigates an alternative explanation: that LLMs internally encode the security-relevant knowledge required to avoid such vulnerabilities, yet fail to reliably apply this knowledge during generation, a generation deficit rather than a knowledge deficit. To examine this hypothesis systematically, we first categorise Common Weakness Enumerations (CWEs) into semantically aligned groups, such as injection flaws, memory-safety errors, and cryptographic misuse, reflecting distinct underlying reasoning demands. For each group, we train linear probes on the model's residual stream activations to assess whether secure and insecure code intent is linearly separable internally, and contrast this against the model's generation-time security performance. Building on this analysis, we compare two inference-time methods that intervene on the model's internal computation, activation steering and contrastive decoding, characterising how their relative effectiveness varies across CWE groups and whether representational separability predicts which method proves more effective for a given group.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Ahrar Bin Aslam

Type of Poster: Master Intro

Advisor: Katharina Krombholz, Dañiel Gerhardt

Title: Login Illusions: Does a Login Page's Design Make People Think It's More Secure?

Research Area: RA6: Empirical and Behavioural Security

Abstract: When users access a website, they often decide whether it is trustworthy before entering sensitive information such as their credentials. However, actual security features like encryption and HTTPS are hidden from users, while visible elements such as design quality, logos, padlock icons, and professional language can strongly influence their perception of security. Previous research has shown that visually attractive websites are often rated as more secure, but existing studies mainly focus on phishing emails rather than login pages specifically. Furthermore, many studies measure what users report they would do rather than their actual behavior and tend to examine the presence or absence of a single security indicator rather than manipulating multiple visual design elements. This study aims to address these gaps by investigating how login page design affects perceived security and users' willingness to enter their credentials. Figma-based login page mockups will be created by systematically varying four visual factors, design quality, logo familiarity, padlock icon presence, and language professionalism. This study will use a mixed-methods approach, combining a controlled quantitative experiment and follow-up interviews, to determine which of these design cues most strongly shape security perception and whether visual aesthetics can override actual technical security indicators.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Syed Sajjad Raza Rizvi

Type of Poster: Master Intro

Advisor: Christoph Landolt, Mario Fritz

Title: Respawning Benchmarks: Closed-Loop Generation of Synthetic Web CTFs for Evaluating Offensive LLMs

Research Area: RA2: Trustworthy Information Processing

Abstract: Recent advances in large language models (LLMs) have enabled automated exploit generation and Capture‑the‑Flag (CTF) solving, but current evaluations of offensive capability still rely on static, hand‑built benchmarks such as web CTFs and CVE reproductions. These tasks are widely replicated across the web and likely included in large‑scale training crawls, which makes it difficult to keep test sets uncontaminated, maintain difficulty as models improve, and distinguish genuine capability from memorization. This thesis addresses that gap by investigating whether executable web CTF benchmarks synthesized through a generative, closed-loop pipeline can provide continuously renewable, sufficiently novel, and contamination-resistant alternatives to conventional static evaluations of offensive LLMs. The proposed approach uses a closed‑loop, multi‑agent architecture: starting from human and model‑authored writeups, it synthesizes new web CTF challenges via template‑based generation with controlled edits, automatically checks their solvability in a sandboxed environment, and then evolves the benchmark over time through systematic variation of verified tasks. The thesis will evaluate whether the resulting benchmarks remain executable and non‑trivial, achieve semantic and attack‑surface diversity beyond their seeds, and reduce sensitivity to contamination proxies compared to reused public CTFs. If successful, the work will contribute a concrete methodology and empirical evidence that generative, execution‑grounded web CTF benchmarks are a viable path toward more robust assessments of offensive LLM capabilities.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Julian Rederlechner

Type of Poster: Master Intro

Advisor: Ali Abbasi

Title: Security Has Entered the Power Budget: On Measuring the Power Impact of Security Mitigations in Space Systems

Research Area: RA4: Threat Detection and Defenses

Abstract: The rapid growth of the commercial space sector has increased the number of satellites in orbit and made satellite communication hardware more widely accessible. Consequently, securing space systems has become increasingly important. However, satellites operate under strict energy constraints, relying primarily on solar power. Security mechanisms must therefore be assessed not only by their effectiveness, but also by their impact on the available power budget. The long-term goal of this research is to quantify the energy overhead of security mitigations and identify mechanisms that provide meaningful protection at an acceptable energy cost. This thesis takes the first step towards that goal. We aim to investigate the feasibility of such measurements by developing a setup for measuring the power consumption of security mitigations on representative physical hardware.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Niklas Lohmann

Type of Poster: Master Intro

Advisor: Michael Schwarz, Lorenz Hetterich

Title: Single Instruction Differential Fuzzing for Loongson Processors

Research Area: RA4: Threat Detection and Defenses

Abstract: This thesis presents a differential testing framework for uncovering architectural flaws in the Loongson processor family. The framework is a user-space tool for identifying inconsistencies between processor implementations by executing single LoongArch instructions on multiple implementations and comparing their architectural outcomes. Unlike previous approaches such as RISCover, which test randomized instruction sequences, this approach focuses on single instructions in order to assess whether this is already sufficient to surface such discrepancies, or whether longer sequences are necessary to reveal them. The goal of this project is to make this approach usable on Loongson CPUs and their associated software models. This requires building support for LoongArch instruction execution, developing a cross-platform sandbox that executes these instructions safely, and creating an automated workflow for differential comparisons across various Loongson hardware and simulator configurations. Ultimately, the project enables automated CPU vs CPU and CPU vs simulator tests to uncover inconsistent instruction behavior, hidden microarchitectural quirks, and potential security issues that are reachable from unprivileged user space.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Alexandru Andrița

Type of Poster: Master Intro

Advisor: Mario Fritz, Christoph R. Landolt, Hossein Hajipour

Title: Black-Box Prediction of Recurring Security Weaknesses

Research Area: RA2: Trustworthy Information Processing

Abstract: Large Language Models (LLMs) can nowadays generate complete and deployment-ready web applications from natural-language prompts. However, models tend to introduce recurring vulnerabilities across multiple generations. Given a specific feature and a model, the model introduces the vulnerabilities every time the target feature is implemented, regardless of the domain to which the application belongs. The weaknesses are therefore systematic rather than incidental. Thus, this opens a new black-box attack vector: the weaknesses of a deployed application may be predicted without access to the backend source code. However, exploiting it requires the identity of the generating model. Although current approaches take the model identity as given, in reality, a deployed application rarely discloses such information. In the thesis, we will address whether Common Weakness Enumerations (CWEs) can be correctly predicted from the client-side code alone by removing the assumption that the identity of the generating model is known and predict the vulnerabilities based only on the artefacts a web page visitor can observe. Since the weaknesses are associated with the model, the training combines the weakness objective with a second task that asks the same representation to identify the generating model. A feasibility study on six LLMs validates that the model is recoverable from client-side code and that its fingerprints are distributed across multiple features rather than concentrated in one. Vulnerability prediction can therefore be seen as a black-box approach, without the model identity or the backend source code that prior work requires.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Kajo Mertz

Type of Poster: Bachelor Intro

Advisor: Norman Becker

Title: Using Fandango and the Arlington model to fuzz PDF files

Research Area: RA4: Threat Detection and Defenses

Abstract: As PDF files have become an increasingly large part of business, government and personal communication, there is an ever pressing need to ensure that the multitude of systems that read and write them be able to interoperate properly. In the last few years this has meant that even the basic PDF specification (ISO 32000-2:2020 (PDF 2.0)) has grown to over one thousand pages of non machine readable, dense prose, making it almost impossible to manually verify correctness of implementations. In this work we propose a fuzzing system, leveraging the Arlington model, a machine readable PDF object model, and Fandango, a constraint and grammar based fuzzer, able to generate random but correct PDF files which we will then use as a mutation target to achieve maximal code coverage.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Abhi Maheshbhai Gabani

Type of Poster: Bachelor Intro

Advisor: Nimrah Mustafa, Rebekka Burkholz

Title: Temporal Graph Learning for the International Food Trade Network

Research Area: RA7: Others

Abstract: The global food trade network is a deeply interconnected system that is highly vulnerable to unexpected shocks. This makes the prediction of future trade flows a critical task for understanding global food security. In this thesis, international crop trade is modeled as a Discrete-Time Dynamic Graph (DTDG), which captures its complex temporal evolution, using yearly snapshots. Predicting trade in this domain poses unique challenges due to high sparsity, heavy-tailed distributions and shifting temporal dynamics. To address these challenges, a diverse suite of machine learning and graph-based architectures is evaluated on dynamic link prediction and regression tasks to forecast the existence and volume of future bilateral trade. A primary focus of this work lies in establishing a rigorous evaluation framework. By going beyond simple random sampling to implement task-aligned negative sampling strategies, models are provided the opportunity to learn meaningful temporal indicators of trade route formation and collapse rather than relying on static memorization. Furthermore, model performance is assessed using binary classification metrics suited for an imbalanced, zero-inflated problem, alongside grouped analyses. This allows us to study the learned models' generalization across different levels instead of just major global hubs, and their robustness to more vulnerable, import-dependent nations.

 

19.08.2026, 14:00 - 16:00, CISPA C0 (Stuhlsatzenhaus 5, 66123 Saarbrücken)

 

Presenter: Arnold Smakaj

Type of Poster: Bachelor Intro

Advisor: Ali Abbasi, Andreas Zeller

Title: MPUConFuzz: Fuzzing the Memory Protection Unit of Arm Cortex-M Microcontrollers

Research Area: RA5: Secure Mobile and Autonomous Systems

Abstract: Embedded systems are everywhere, appearing in consumer Internet of Things devices, automobiles, satellites, and critical infrastructure. Despite their wide use, end users and companies face difficulties ensuring the security and reliability of these systems, mainly because their hardware and software are often closed-source and proprietary. Mistakes in the design and implementation of microcontrollers may remain undetected, exposing millions of devices to potential vulnerabilities. Such mistakes are expensive to fix, because the affected chips have already been manufactured and distributed. Previous research has examined firmware and operating systems, as well as silicon level security on various platforms. However, post-silicon analysis of microcontroller security mechanisms remains relatively unexplored. One such mechanism is the Memory Protection Unit (MPU): a hardware isolation primitive used in Arm Cortex-M microcontrollers. In this thesis, we design and implement a fuzzer for Arm Cortex-M MPUs. The system consists of a host-side fuzzer and a minimal firmware harness running on physical hardware. The host generates MPU configurations and memory access operations based on a set of carefully crafted test cases and mutation strategies. These inputs are executed on the target microcontroller, and the observed behaviour is compared against a specification conforming oracle. We test microcontrollers from various vendors and architectures to identify discrepancies between the actual silicon implementations and the Arm architecture specification.

 

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