Timetable

Title Type Location Serial Start End All Day
Architectural CPU Bugs Lecture E9 1 (CISPA), room 0.02 31.01.24 31.01.24 No 
Transient Execution Attacks Lecture E9 1 (CISPA), room 0.02 24.01.24 24.01.24 No 
Fault Attacks Lecture E9 1 (CISPA), room 0.02 17.01.24 17.01.24 No 
Page Table Attacks Lecture E9 1 (CISPA), room 0.05 09.01.24 09.01.24 No 
Mitigations Lecture E9 1 (CISPA), room 0.05 05.12.23 05.12.23 No 
Other Side Channels and Frameworks Lecture E9 1 (CISPA), room 0.05 28.11.23 28.11.23 No 
Cache Attacks II Lecture E9 1 (CISPA), room 0.05 21.11.23 21.11.23 No 
Cache Attacks I Lecture E9 1 (CISPA), room 0.05 14.11.23 14.11.23 No 
Introduction to Microarchitecture Lecture 07.11.23 07.11.23 No 
Timing Side Channels Lecture E9 1 (CISPA), room 0.05 31.10.23 31.10.23 No 
Introduction Lecture E9 1 (CISPA), room 0.05 24.10.23 24.10.23 No 
Practical 4 Deadline Practical 02.02.24 N/A Yes 
Practical 4 Practical 09.01.24 N/A Yes 
Practical 3 Deadline Practical 26.01.24 N/A Yes 
Practical 3 Practical 05.12.23 N/A Yes 
Practical 2 Deadline Practical 05.01.24 N/A Yes 
Practical 2 Practical 28.11.23 N/A Yes 
Practical 1 Deadline Practical 24.11.23 N/A Yes 
Practical 1 Practical 31.10.23 N/A Yes 
Re-Exam Exam E2 2, Günter-Hotz-Hörsaal 19.03.24 19.03.24 No 
Exam Exam E2 2, Günter-Hotz-Hörsaal 27.02.24 27.02.24 No 
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