Side-Channel Attacks and Defenses

Michael Schwarz

Timetable

Title Type Location Serial Start End All Day
Cache Attacks I Lecture E9 1 (CISPA), room 0.05 12.11.24 12.11.24 No 
Architectural CPU Bugs Lecture E9 1 (CISPA), room 0.05 28.01.25 28.01.25 No 
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