Timetable
Title | Type | Location | Serial | Start | End | All Day | |
---|---|---|---|---|---|---|---|
Introduction | Lecture | E9 1 (CISPA), room 0.05 | 24.10.23 | 24.10.23 | No | ||
Timing Side Channels | Lecture | E9 1 (CISPA), room 0.05 | 31.10.23 | 31.10.23 | No | ||
Practical 1 | Practical | 31.10.23 | N/A | Yes | |||
Introduction to Microarchitecture | Lecture | 07.11.23 | 07.11.23 | No | |||
Cache Attacks I | Lecture | E9 1 (CISPA), room 0.05 | 14.11.23 | 14.11.23 | No | ||
Cache Attacks II | Lecture | E9 1 (CISPA), room 0.05 | 21.11.23 | 21.11.23 | No | ||
Practical 1 Deadline | Practical | 24.11.23 | N/A | Yes | |||
Other Side Channels and Frameworks | Lecture | E9 1 (CISPA), room 0.05 | 28.11.23 | 28.11.23 | No | ||
Practical 2 | Practical | 28.11.23 | N/A | Yes | |||
Mitigations | Lecture | E9 1 (CISPA), room 0.05 | 05.12.23 | 05.12.23 | No |