Timetable

Title Type Location Serial Start End All Day
Transient Execution Attacks II Lecture E9 1 (CISPA), room 0.05 21.01.25 21.01.25 No 
Architectural CPU Bugs Lecture E9 1 (CISPA), room 0.05 28.01.25 28.01.25 No 
Pratical 4 - Deadline Practical 31.01.25 31.01.25 No 
Exam Exam E2 2, Günter-Hotz-Hörsaal 11.03.25 11.03.25 No 
Exam (LUH) Exam 1101.A310 26.03.25 26.03.25 No 
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