Timetable

Title Type Location Serial Start End All Day
Transient Execution Attacks II Lecture E9 1 (CISPA), room 0.05 21.01.25 21.01.25 No 
Transient Execution Attacks I Lecture E9 1 (CISPA), room 0.05 14.01.25 14.01.25 No 
Timing Side Channels Lecture E9 1 (CISPA), room 0.05 29.10.24 29.10.24 No 
Re-Exam Exam E2 2, Günter-Hotz-Hörsaal 01.04.25 01.04.25 No 
Practical 2 Practical 19.11.24 19.11.24 No 
Practical 1 Deadline Practical 15.11.24 15.11.24 No 
Page Table Attacks Lecture E9 1 (CISPA), room 0.05 17.12.24 17.12.24 No 
Other Side Channels and Frameworks Lecture E9 1 (CISPA), room 0.05 03.12.24 03.12.24 No 
Mitigations Lecture E9 1 (CISPA), room 0.05 10.12.24 10.12.24 No 
Introduction to Microarchitecture Lecture Online 05.11.24 05.11.24 No 
Introduction Lecture E9 1 (CISPA), room 0.05 22.10.24 22.10.24 No 
Fault Attacks Lecture E9 1 (CISPA), room 0.05 07.01.25 07.01.25 No 
Exam (LUH) Exam 1101.A310 26.03.25 26.03.25 No 
Exam Exam E2 2, Günter-Hotz-Hörsaal 11.03.25 11.03.25 No 
Cache Attacks II Lecture E9 1 (CISPA), room 0.05 19.11.24 19.11.24 No 
Cache Attacks I Lecture E9 1 (CISPA), room 0.05 12.11.24 12.11.24 No 
Architectural CPU Bugs Lecture E9 1 (CISPA), room 0.05 28.01.25 28.01.25 No 
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