| Title |
Type |
Location |
Serial |
Start |
End |
All Day |
|
|
Architectural CPU Bugs |
Lecture |
E9 1 (CISPA), room 0.05 |
|
28.01.25 |
28.01.25 |
No |
|
|
Transient Execution Attacks II |
Lecture |
E9 1 (CISPA), room 0.05 |
|
21.01.25 |
21.01.25 |
No |
|
|
Transient Execution Attacks I |
Lecture |
E9 1 (CISPA), room 0.05 |
|
14.01.25 |
14.01.25 |
No |
|
|
Fault Attacks |
Lecture |
E9 1 (CISPA), room 0.05 |
|
07.01.25 |
07.01.25 |
No |
|
|
Page Table Attacks |
Lecture |
E9 1 (CISPA), room 0.05 |
|
17.12.24 |
17.12.24 |
No |
|
|
Mitigations |
Lecture |
E9 1 (CISPA), room 0.05 |
|
10.12.24 |
10.12.24 |
No |
|
|
Other Side Channels and Frameworks |
Lecture |
E9 1 (CISPA), room 0.05 |
|
03.12.24 |
03.12.24 |
No |
|
|
Cache Attacks II |
Lecture |
E9 1 (CISPA), room 0.05 |
|
19.11.24 |
19.11.24 |
No |
|
|
Cache Attacks I |
Lecture |
E9 1 (CISPA), room 0.05 |
|
12.11.24 |
12.11.24 |
No |
|
|
Introduction to Microarchitecture |
Lecture |
E9 1 (CISPA), room 0.05 |
|
05.11.24 |
05.11.24 |
No |
|
|
Timing Side Channels |
Lecture |
E9 1 (CISPA), room 0.05 |
|
29.10.24 |
29.10.24 |
No |
|
|
Introduction |
Lecture |
E9 1 (CISPA), room 0.05 |
|
22.10.24 |
22.10.24 |
No |
|
